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The TMS320C64xx is Texas Instruments fastest (currently) fixed-point DSP family. It is part of the TMS320C6x DSP family, which is in turn part of the TMS320 family. * It has 256-bit VLIW based on VelociTI instruction set dual bus Harvard architecture. * 32-bit data word length * Clock speed ranging from 300–1000 MHz * Code compatible with the older C6200 fixed-point family. * The C64xx CPU has two sets of functional units. Each set contains four units and a register file of 16 (C64x) or 32 (C64x+) 32-bit registers. There is a cross path between the sets of functional units. * * M - All multiplication operations also include bit-count, rotate, Galois field multiplies, and bidirectional variable shift hardware. * * L - Logic and arithmetic operations - 32/40-bit arithmetic and compare operations and 32-bit logical operations * * S - Logic and arithmetic operations - 32-bit arithmetic operations, 32/40-bit shifts and 32-bit bit-field operations, 32-bit logical operations, Branches, Constant generation and Register transfers to/from control register file (.S2 only) * * D - Data addressing units - Address calculations, loads and stores, constant generation and 32 logical operations For more details + * 64 registers of 32-bit word length * Capable of up to four 16-bit MAC (multiply–accumulates) per cycle or up to eight 8-bit MAC per cycle. == DM64x == (詳細はperipherals for digital media applications including: * Two to three video ports * Ethernet MAC * Option for PCI - DM642 only * Vic - analog-to-digital converter (9–16 bit resolution) * I²C 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「Texas Instruments TMS320C6400」の詳細全文を読む スポンサード リンク
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